The present invention relates in general to data processing systems, and in particular, to a method, an apparatus as well as a computer program product and a system for measuring a slew rate of a digital high speed repeating signal on-chip.
A clock tree or clock grid may distribute a clock signal to an integrated circuit. Often design requirements such as duty cycle, skew, and slew rate may not be reached due to design limitations. Additionally, design variations may cause unpredictable inaccuracies and unexpected deviations from these design requirements.
Therefore displaying the time behavior of critical signals (e.g. a clock signal) on integrated circuits is important for the functionality and reliability of a VLSI chip. Beside the signal waveform the slew rate is a relevant figure of merit and has to be monitored to meet design requirements.